英语词汇“base address”的意思、用法、释义、翻译、读音、例句、短语、词组-英语词典

是什么意思

释义

基（地）址；

英英释义

Base address

In computing, a base address is an address serving as a reference point ("base") for other addresses.

以上来源于:Wikipedia

学习怎么用

双语例句

用作名词(n.)

An address expressed as a difference with respect to a base address.
一种地址，用绝对地址与基地址之差来表示。
Preferred base addresses must always start on an allocation-granularity boundary.
首选基地址必须始终从分配粒度边界开始。

权威例句

base address
base address
Exploiting base address locality in low power data cache design
Base Address Recognition with Data Flow Tracking for Injection Attack Detection
Base Address Recognition with Data Flow Tracking for Injection Attack Detection
Base address generation in a multi-processing system having plural memories with a unified address space corresponding to each proce...
Virtual machine function based sub-page base address register access for peripheral component interconnect device assignment
Static Prediction of Worst-Case Data Cache Performance in the Absence of Base Address Information
Static Prediction of Worst-Case Data Cache Performance in the Absence of Base Address Information
Memory configuration decoding system having automatic row base address generation mechanism for variable memory devices with row acc...

单词	base address
释义	base address 听听怎么读英 [beis ??dres] 美 [bes ??dr?s] 是什么意思释义基（地）址；英英释义 Base address In computing, a base address is an address serving as a reference point ("base") for other addresses. 以上来源于:Wikipedia 学习怎么用双语例句用作名词(n.) An address expressed as a difference with respect to a base address. 一种地址，用绝对地址与基地址之差来表示。 Preferred base addresses must always start on an allocation-granularity boundary. 首选基地址必须始终从分配粒度边界开始。权威例句 base address base address Exploiting base address locality in low power data cache design Base Address Recognition with Data Flow Tracking for Injection Attack Detection Base Address Recognition with Data Flow Tracking for Injection Attack Detection Base address generation in a multi-processing system having plural memories with a unified address space corresponding to each proce... Virtual machine function based sub-page base address register access for peripheral component interconnect device assignment Static Prediction of Worst-Case Data Cache Performance in the Absence of Base Address Information Static Prediction of Worst-Case Data Cache Performance in the Absence of Base Address Information Memory configuration decoding system having automatic row base address generation mechanism for variable memory devices with row acc...
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